MCH2022 badge
This page is about the FPGA on the MCH2022 badge, which is a
ICE40 UP5K FPGA that has 5280 logic units, 1104kbit RAM, eight DSP cores
and 39 programmable I/O pins besides the two I²C and two SPI interfaces.
datasheet.
Connections
The FPGA is connected to RP2040 and ESP-WROVER processors,
the ILI9341 LCD driver, the ESP-PSRAM64H ram, an RGB LED and the J4 connector.
Below the various connections are mentioned. The logical names (to be used in
Verilog files) appearing in the first column, are taken from the
proto2.pcf file from the badgeteam/mch2021-fpga-lcd-driver-test GitHub
repository.
RP2040
RP2040 datasheet
FPGA RP2040
--------------------------------------------------------------
uart_tx 6 IOB_13b UART_RX FPGA_RX GPIO24
uart_rx 9 IOB_16a UART_TX FPGA_TX GPIO25
clk 35 IOT_46b_G0 ~~ FPGA_CDONE (clock)
7 CDONE FPGA_CDONE FPGA_CDONE GPI027/ADC1
8 CRESET FPGA_RESET FPGA_RESET GPIO17
ESP32-WROVER
FPGA ESP-WROVER
---------------------------------------------------------------
spi_miso 14 IOB_32a_SPI_SO SPI_MISO SPI_MISO 7 IO35
spi_mosi 17 IOB_33b_SPI_SI SPI_MOSI SPI_MOSI 37 IO23
spi_sck 15 IOB_34a_SPI_SCK SPI_SCK SPI_CLK 30 IO18
spi_cs 16 IOB_35b_SPI_SS SPI_CS SPI_CS_FPGA 12 IO27
irq 10 IOB_18a IRQ IRQ_FPGA 5 SENSOR_VN
FPGA ILI9341
--------------------------------------------------------------------
lcd_fmark 25 IOT_36b LCD_FMARK FMARK 08 FMARK (frame sync)
i2s_clk 28 IOT_41a LCD_CS CS 09 CS
lcd_rs 11 IOB_20a LCD_RS PAR_RS 10 RS/SCK (register select)
lcd_wr 23 IOT_37a LCD_WR PAR_WR 11 WR/R5 (write at rising edge)
i2s_data 36 IOT_48b LCD_RST RESET 15 RESET
lcd_data[0] 26 IOT_39a LCD_D0 PAR_D0 25 DB08
lcd_data[1] 27 IOT_38b LCD_D1 PAR_D1 26 DB09
lcd_data[2] 31 IOT_42b LCD_D2 PAR_D2 27 DB10
lcd_data[3] 32 IOT_43a LCD_D3 PAR_D3 28 DB11
lcd_data[4] 34 IOT_44b LCD_D4 PAR_D4 29 DB12
lcd_data[5] 37 IOT_45a_G1 LCD_D5 PAR_D5 30 DB13
lcd_data[6] 38 IOT_50b LCD_D6 PAR_D6 31 DB14
lcd_data[7] 42 IOT_51a LCD_D7 PAR_D7 32 DB15
i2s_lr 43 IOT_49a LCD_MODE MODE 38 IM0, 39 IM1, 40 IM2
ILI9341 datasheet
ESP-PSRAM64H
datasheet
FPGA ESP-PSRAM64H
--------------------------------------
ram_data0 21 IOB_23b 5 MOSI/IO0
ram_data1 13 IOB_24a 2 MISO/IO1
ram_data2 12 IOB_22b 3 IO2
ram_data3 20 IOB_25b_G3 7 IO3
ram_sck 19 IOB_29b 6 SCK
ram_cs 18 IOB_31b 1 CS
J4 connector
FPGA J4
-------------------------------------------
pmod[0] 47 IOB_2a PMOD_1 PMOD 2
pmod[1] 48 IOB_4a PMOD_2 PMOD 4
pmod[2] 4 IOB_8a PMOD_3 PMOD 6
pmod[3] 2 IOB_6a PMOD_4 PMOD 8
pmod[4] 44 IOB_3b_G6 PMOD_7 PMOD 1
pmod[5] 45 IOB_5b PMOD_8 PMOD 3
pmod[6] 3 IOB_9a PMOD_9 PMOD 5
pmod[7] 46 IOB_0a PMOD_10 PMOD 7
RGB LED
FPGA RGB-S050
---------------------
40 RGB1 RGB1 R
41 RGB2 RGB2 G
39 RGB0 RGB0 B
FPGA programming software
To program a FPGA there is a choice between two languages:
VHDL and
Verilog. The ICE40 can be
programmed with the iCEcube2
Design software which supports both programming in VHDL and Verilog.
See iCEcub2 2017-08 User Guide.
Open source Verilog tool chain
There is also an open source tool chain for programming the ICE40 FPGA using
Verilog. To build this
CMake version 3.13 or higher is needed, along some other standard packages.
The tools needed are part of Yosys Open
SYnthesis Suite and Project IceStorm.
Ubuntu
For Ubuntu follow the following steps can be used to build the tool chain
starting in some directory:
sudo apt-get install build-essential clang bison flex libreadline-dev \
gawk tcl-dev libffi-dev git mercurial graphviz \
xdot pkg-config python python3 libftdi-dev \
qt5-default python3-dev libboost-all-dev cmake libeigen3-dev
git clone https://github.com/YosysHQ/icestorm.git
cd icestorm
make -j$(nproc)
sudo make install
cd ..
git clone https://github.com/cseed/arachne-pnr.git
cd arachne-pnr
make -j$(nproc)
sudo make install
cd ..
git clone https://github.com/YosysHQ/nextpnr
cd nextpnr
cmake -DARCH=ice40 -DCMAKE_INSTALL_PREFIX=/usr/local .
make -j$(nproc)
sudo make install
cd..
git clone https://github.com/YosysHQ/yosys.git
cd yosys
make config-clang
make
make test
sudo make install
cd ..
Programming
iCE40 Programming and Configuration Chapter 13.
Links
Some interesting links:
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